I was asked to solve the interfacing E1 chip via SPI. First, try out with the parallel port in my PC, then, followed by the configurable processor. Both are running Linux. SPI uses only 4 I/O pins, thus, making it a perfect choice if you don’t want to waste your address mapping. The only setback is that it is a serial communication. Using the customized processor in FPGA, one single bit data transfer consumes 67.2 us. A read from or write to a register for 8-bit data takes about 1.68ms. Luckily, this is simply used for initial configuration and random monitoring purposes.
Waveform captured from the logic analyzer…… Look like glitches occur in the SDO line
Using the customized processor in FPGA, one single bit data transfer consumes 67.2 us. A read from or write to a register for 8-bit data takes about 1.68ms
ReplyDeleteThe speed depends on the devices connected. If what they are doing can handle faster speeds, you can configure the clock input to toggle faster and send bits at a higher rate. I haven't configured or checked the specs for a while but I'm sure that the speed that I'm using is much, much higher than the one that you are using. I think it's 8MHz/16 or 500kHz clock so the data transfer rate is 500kbps or 62.5kB/s.
Can't see your picture so I can't comment about the glitches.
I use a GPIO module connected to my customized processor running at 100MHz system clock, instead of SPI hardware implementation.....
ReplyDeleteWell, I still think it can be much faster.
ReplyDeleteTimer implementation or even simple looping. The only problem is the hardware that you are talking to may not handle the speed.